QSC Q-SYS PS-1650G Manual de usuario descargar pdf (Pagina 6)

Add a Custom Pattern Generator

The pattern generator generates multiple test patterns to test the off-chip SDRAM device. The custom

pattern generator system provides a stream of pattern data via an Avalon-ST source interface.

The component is programmed with the pattern data and a pattern length. When the end of the pattern is

reached, the custom pattern generator cycles back to the first element of the pattern. This custom pattern

generator generates the following standard memory tester patterns:

• Walking ones

• Walking zeros

• Low frequency

• Alternating low frequency

• High frequency

• Alternating high frequency

• Synchronous PRBS

The width of the memory dictates the walking ones or zeros pattern lengths. For example, when testing a

32-bit memory, the walking ones or zeros pattern is 32 elements in length before repeating. The high and

low frequency patterns contain only two elements before repeating. The synchronous PRBS pattern is the

longest pattern containing 256 elements before repeating.

This custom pattern generator contains three interfaces, two of which control the generated pattern, and a

third interface which control the behavior of the custom pattern generated. The processor accesses the

pattern_access interface, which is write only, to program the elements of the custom pattern that are sent

to the pattern writer core, and the csr interface, which is used for the control and status registers. The

st_pattern_output is the streaming source interface that sends data to the pattern writer core.

To add the custom pattern generator:

1. In the IP Catalog, expand Memory Test Microcores, and then double-click Custom Pattern

Generator.

2. In the parameter editor, accept the default parameters, and then click Finish.

3. Rename the instance to custom_pattern_generator.

4. Set the custom_pattern_generator clock interface to clk_0.

5. To connect the custom_pattern_generator csr interface to the mm_bridge m0 interface, in the

Connections column, click to fill in the connection dot between the custom_pattern_generator csr

interface and the mm_bridge m0 interface.

6. Connect the custom_pattern_generator pattern_access interface to the mm_bridge m0 interface.

The processor accesses the system through the m0 interface to communicate with the csr and

pattern_access interfaces.

7. To assign the custom_pattern_generator csr interface to a base address of 0400, in the Base column,

double-click the 0x00000000 address, and then enter 400 for the base address, which is in hexadecimal

format.

If the Base column is locked for the custom_pattern_generator csr, right-click and then click Unlock

Base Address.

The address space represents memory accessible by the processor. Each address specifies a location in

memory that can be addressed and accessed, and each interface must have a unique address range. The

address space of each interface is determined by its base address and its memory span, or how much

memory is required for that interface.

Add a Custom Pattern Generator

TU-01006

2015.05.04

Altera Corporation

Qsys System Design Tutorial

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