QSC Q-SYS PS-1650G Manual de usuario descargar pdf (Pagina 3)

Software and Hardware Requirements

The Qsys System Design tutorial requires the following software and hardware requirements:

• Altera Quartus II software.

• Nios II EDS.

• tt_qsys_design.zip design files, available from the Qsys Tutorial Design Example page. The design

files include project files set up for select Altera development boards, and components that you can use

in any Qsys design.

You can build the Qsys system in this tutorial for any Altera development board or your own custom

board, if it meets the following requirements:

• An Altera Arria, Cyclone, or Stratix series FPGA.

• Minimum of 12k logic elements (LEs).

• Minimum of 128k of embedded memory.

• JTAG connection to the FPGA that provides a communications link back to the host so that you can

monitor the memory test progress.

• Any memory that has a Qsys-based controller with an Avalon

Memory-Mapped (Avalon-MM) slave

interface.

Related Information

• Altera Software Installation and Licensing Manual.

• Qsys Tutorial Design Example

• Qsys Tutorial Design Example (detailed diagram)

Download and Install the Tutorial Design Files

1. On the Qsys Tutorial Design Example page, under Using this Design Example, click Qsys Tutorial

Design Example (.zip) to download and install the tutorial design files for the Qsys tutorial.

2. Extract the contents of the archive file to a directory on your computer. Do not use spaces in the

directory path name.

In place of following all steps in this tutorial to create subsystem, hierarchical, and top-level design files,

you can copy the completed design files listed below into the tt_qsys_design\quartus_ii_projects_for_boards\

<development_board_type> directory, depending on your board type.

• The two completed subsystems: pattern_generator_system.qsys, and pattern_checker_system.qsys

from the tt_qsys_design\completed_subsystems directory.

• The hierarchical system memory_tester_system.qsys from the tt_qsys_design

\completed_subsystems\completed_memory_tester_system directory.

• The top-level hierarchical system top_system.qsys from the tt_qsys_design

\quartus_ii_projects_for_boards\<development_board_type>

\backup_and_completed_top_system\completed_top_system directory.

Related Information

• Qsys Tutorial Design Example

• Qsys Tutorial Design Example (.zip)

TU-01006

2015.05.04

Software and Hardware Requirements

Qsys System Design Tutorial

Altera Corporation

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